Present computer systems include one or more main, or host, processors, each including associated memory for storing programs to be executed and data to be processed. Such systems also include one or more input/output (I/O) peripheral device controllers. The host processors, memory, and peripheral device controllers are all coupled together by a system bus. Such peripheral device controllers may include their own memory and a local processor to control the operation of the peripheral device controller and the peripheral devices to which it is attached. One type of peripheral device controller may be coupled to a plurality of mass storage devices, such a disk drives. A peripheral device controller for a disk drive system includes respective host adapters for coupling to the host processors, and one or more disk adapters, each coupled to one or more disk drives. These adapters are all coupled together via a local bus.
In some such computer systems it is absolutely necessary that data be stored in such a manner that it will not be lost in the event of a failure of a portion of the computer system. This is generally accomplished by providing redundant hardware and/or storing multiple copies of the data. For example, in a disk drive system, a host computer desiring to store data on the disk drives transfers a copy of that data from its memory to the disk drive controller. The disk drive controller stores in its local memory two copies of the data in two different places. Only when the two copies of the data have been made and their accuracy verified is the host processor notified that the data was successfully received by the disk drive system. The disk drive controller then transfers the data from the local memory to the disk drives in such a manner that it may be recovered, even if a disk drive should fail, for example using a RAID arrangement.
Both of these transfers of data are generally made under the control of direct memory access (DMA) controllers in a known manner. A DMA data transfer takes place independently of the program being executed by the processor (either host or local), and can occur at the full burst throughput rate of the host system bus. DMA transfers are generally initiated by providing the DMA controller with: (1) a starting address of the location in the host processor memory containing the data to be sent to the disk drive system (termed the source address); (2) either the amount of data to be transferred, or the ending address the data in the host processor memory (the end address); and (3) the I/O address of the disk drive controller to which it is desired to send the data (the destination address). The DMA controller then requests the host processor to grant it access to the system bus. When access is granted, the DMA controller enables a burst of data of a predetermined size to be transferred by accessing the host processor memory. More specifically, the DMA controller conditions the host memory to place data on the system bus, by placing a memory address on the system bus, conditioning the host memory to place data from the addressed location on the system bus, and simultaneously conditioning the disk drive system to store the data from the system bus in it's local memory. When this transfer is complete, the address is incremented, and the DMA cycle repeated until all the desired data has been transferred, all in a known manner.
If the block of data to be written is large, the transfer of the data from the host computer system to the disk drive controller, and the copying of that data within the disk drive controller can take a relatively long time, and the transfer of that data to the disk drives themselves does not start until the data has been completely and successfully received by the disk drive controller. However, it is possible that sufficient data is received to begin a transfer from the disk drive controller to the disk drives within a relatively short period of time. It is desirable to begin transfer of data from the memory in the disk drive controller to the disk drives as soon as there is sufficient data to do so to minimize the delay from the start of the data transfer from the host computer system until the data is safely written onto the disk drives.